From 33d8bca8a499787f419f4b4ab74753f26fdc4b74 Mon Sep 17 00:00:00 2001 From: Danilo Cammarata Date: Fri, 7 Aug 2026 09:27:00 +0200 Subject: [PATCH 1/2] [HW] Fix hmr_unit.sv syntax --- rtl/HMR/hmr_unit.sv | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/rtl/HMR/hmr_unit.sv b/rtl/HMR/hmr_unit.sv index bbabbce5..c8109b61 100644 --- a/rtl/HMR/hmr_unit.sv +++ b/rtl/HMR/hmr_unit.sv @@ -878,11 +878,12 @@ module hmr_unit #( if (i >= NumTMRCores) begin core_setback_o [i] = '0; end - end - if (i < NumTMRCores && (TMRFixed || core_in_tmr[i])) begin : gen_tmr_mode - assign core_inputs_o[i] = sys_inputs_i[SysCoreIndex]; - end else begin : gen_independent_mode - assign core_inputs_o[i] = sys_inputs_i[i]; + + if (i < NumTMRCores && (TMRFixed || core_in_tmr[i])) begin : gen_tmr_mode + core_inputs_o[i] = sys_inputs_i[SysCoreIndex]; + end else begin : gen_independent_mode + core_inputs_o[i] = sys_inputs_i[i]; + end end end From 2e84face0d1401f0468a70a44c490ec89ef94e9e Mon Sep 17 00:00:00 2001 From: Danilo Cammarata Date: Fri, 7 Aug 2026 10:21:28 +0200 Subject: [PATCH 2/2] [SVH] Fixing BITWISE macro to avoid VCS errors --- include/redundancy_cells/voters.svh | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/include/redundancy_cells/voters.svh b/include/redundancy_cells/voters.svh index cfee8f30..aaa69203 100644 --- a/include/redundancy_cells/voters.svh +++ b/include/redundancy_cells/voters.svh @@ -13,8 +13,7 @@ // Helper Macro to use enums bitwise // This has no effect on array of bits, but does not work on plain logic! -`define BITWISE(a) \ - a[$bits(a)-1:0] +`define BITWISE(a) {a}[$bits(a)-1:0] // Cell Instantiation Macros