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[None][infra] Waive 1 failed cases for main in pre-merge 49229#16786

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yiqingy0 merged 1 commit into
NVIDIA:mainfrom
trtllm-agent:trtllm-ci-report/waive-20260723-071122
Jul 23, 2026
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[None][infra] Waive 1 failed cases for main in pre-merge 49229#16786
yiqingy0 merged 1 commit into
NVIDIA:mainfrom
trtllm-agent:trtllm-ci-report/waive-20260723-071122

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@trtllm-agent trtllm-agent commented Jul 23, 2026

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Auto-generated Waive PR

Created by: TensorRT LLM CI Report (requested by @limin2021)
Target branch: main
Bug(s): 6501837

Waive entries added

full:DGX_B200/accuracy/test_disaggregated_serving.py::TestQwen3NextInstruct::test_auto_dtype[use_py_transceiver=True] SKIP (https://nvbugs/6501837)

This PR was auto-generated by TensorRT LLM CI Report. Please review the waive entries before merging.

Dev Engineer Review

  • Added one correctly scoped waiver in tests/integration/test_lists/waives.txt for the specified DGX B200 test.
  • Includes the associated NVbug 6501837 reference; no public API or code changes.

QA Engineer Review

  • Test-list-only change; no test-db/ or qa/ files were modified.
  • Added one SKIP entry for the disaggregated serving accuracy test.
  • Verdict: needs follow-up because CBTS coverage data is unavailable.

Bug(s): 6501837
Requested by: @limin2021

Signed-off-by: trtllm-agent <296075020+trtllm-agent@users.noreply.github.com>
@coderabbitai

coderabbitai Bot commented Jul 23, 2026

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Review Change Stack

No actionable comments were generated in the recent review. 🎉

ℹ️ Recent review info
⚙️ Run configuration

Configuration used: Path: .coderabbit.yaml

Review profile: CHILL

Plan: Enterprise

Run ID: ff050b32-7523-4867-9d2f-77d610a9905e

📥 Commits

Reviewing files that changed from the base of the PR and between c6e0c98 and abc0f2f.

📒 Files selected for processing (1)
  • tests/integration/test_lists/waives.txt

Walkthrough

Added a waiver entry for the DGX_B200 Qwen3Next auto-dtype test variant using use_py_transceiver=True, along with its NVbug reference.

Changes

Integration test waiver

Layer / File(s) Summary
Add DGX_B200 test waiver
tests/integration/test_lists/waives.txt
Adds a skipped entry for the specified TestQwen3NextInstruct::test_auto_dtype variant and its NVbug reference.

Estimated code review effort: 1 (Trivial) | ~2 minutes

Possibly related PRs

Suggested reviewers: dongxuy04

🚥 Pre-merge checks | ✅ 5
✅ Passed checks (5 passed)
Check name Status Explanation
Title check ✅ Passed The title matches the change: adding one infra waive entry for a failed pre-merge test on main.
Description check ✅ Passed The description clearly states the auto-generated waive, the target branch, the bug ID, and the exact waived test entry.
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
✨ Finishing Touches
🧪 Generate unit tests (beta)
  • Create PR with unit tests

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@limin2021

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/bot run

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PR_Github #61237 [ run ] triggered by Bot. Commit: abc0f2f Link to invocation

@yiqingy0

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/bot skip --comment "waive a test"

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PR_Github #61249 [ skip ] triggered by Bot. Commit: abc0f2f Link to invocation

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PR_Github #61237 [ run ] completed with state ABORTED. Commit: abc0f2f

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PR_Github #61249 [ skip ] completed with state SUCCESS. Commit: abc0f2f
Skipping testing for commit abc0f2f

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@yiqingy0
yiqingy0 merged commit a47577a into NVIDIA:main Jul 23, 2026
12 checks passed
hhzhang16 added a commit to hhzhang16/TensorRT-LLM that referenced this pull request Jul 23, 2026
…nnahz/dep-1083-port-flashinfer-stable-va-lifecycle-for-native-all-reduce

* 'main' of https://github.com/NVIDIA/TensorRT-LLM: (83 commits)
  [None][feat] Bind SourceIdentity to checkpoint artifacts (NVIDIA#16159)
  [None][infra] Waive 4 failed cases for main in pre-merge 49550 (NVIDIA#16798)
  [None][fix] Make FlashInfer sampling op wrappers opaque to Dynamo (NVIDIA#16732)
  [None][feat] top-k: route decode to CuTe DSL GVR top-k in e2e (NVIDIA#16420)
  [None][feat] Default GLM-5 to the Python KV-cache transceiver (NVIDIA#16524)
  [None][chore] Add NVTX ranges to per-iteration ADP sync points in PyExecutor (NVIDIA#16422)
  [https://nvbugs/6426850][test] Unwaive Qwen3.5 397B NVFP4 ADP4 TRTLLM test (NVIDIA#16348)
  [https://nvbugs/6445456][fix] Restore inplace ops for functionalization v2 (NVIDIA#16410)
  [None][infra] Waive 1 failed cases for main in pre-merge 49229 (NVIDIA#16786)
  [None][fix] Load DeepSeek V4 mixed-precision NVFP4 checkpoints (NVIDIA#16433)
  [None][feat] ADP conversation router: configurable least-queued placement for new conversations (NVIDIA#16294)
  [None][infra] Waive 1 failed cases for main in pre-merge 49424 (NVIDIA#16780)
  [None][infra] Waive 1 failed cases for main in pre-merge 49424 (NVIDIA#16781)
  [TRTLLMINF-188][infra] Require approval for PerfSanity wildcard runs (NVIDIA#16777)
  [TRTLLM-13969][feat] Support MiniMax M3 for Disaggregated Serving (NVIDIA#16017)
  [NVIDIA#11932][fix] Filter CUTLASS MoE GEMM tile configs by device shared memory on SM121 (NVIDIA#12704)
  [None][chore] Remove attention backend test waivers (NVIDIA#16723)
  [TRTLLM-14540][perf] Skip fp32 state round-trip in FlashInfer GDN pre… (NVIDIA#16703)
  [TRTLLM-13694][feat] Add IBDB recipe provenance and refresh configs (NVIDIA#16254)
  [None][infra] Preview/bump/main (NVIDIA#16758)
  ...

Signed-off-by: Hannah Zhang <hannahz@nvidia.com>
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4 participants