OSCPU · klin02 · Dec 31, 2025 · Dec 17, 2025
diff --git a/difftest b/difftest
diff --git a/src/main/scala/sim/NutShellSim.scala b/src/main/scala/sim/NutShellSim.scala
@@ -45,8 +45,7 @@ class NutShellSim extends Module with HasDiffTestInterfaces {
 
   val uart = IO(new UARTIO)
   uart <> mmio.io.uart
-  override def connectTopIOs(difftest: DifftestTopIO): Seq[Data] = {
+  override def connectTopIOs(difftest: DifftestTopIO): Unit = {
     difftest.uart <> uart
-    Seq.empty
   }
 }
diff --git a/src/test/scala/TopMain.scala b/src/test/scala/TopMain.scala
@@ -39,9 +39,6 @@ class Top extends Module {
 class FpgaDiffTop extends NutShell()(NutCoreConfig(FPGADifftest = true)) with HasDiffTestInterfaces {
   override def desiredName: String = "NutShell"
   override def cpuName: Option[String] = Some("NutShell")
-  override def connectTopIOs(difftest: DifftestTopIO): Seq[Data] = {
-    Seq(io)
-  }
 }
 
 object TopMain extends App {
+1 −1		.github/workflows/format.yml
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+4 −1		Makefile
+11 −6		README.md
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+75 −49		src/main/scala/DPIC.scala
+108 −18		src/main/scala/Delta.scala
+91 −91		src/main/scala/Difftest.scala
+18 −14		src/main/scala/Gateway.scala
+12 −13		src/main/scala/Preprocess.scala
+1 −1		src/main/scala/Replay.scala
+35 −6		src/main/scala/SimTop.scala
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+2 −1		src/main/scala/common/Mem.scala
+14 −6		src/main/scala/util/Profile.scala
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+308 −0		src/test/csrc/common/args.cpp
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+403 −0		src/test/csrc/difftest/checkers.h
+239 −0		src/test/csrc/difftest/checkers/globalmem.cpp
+170 −0		src/test/csrc/difftest/checkers/instructions.cpp
+257 −0		src/test/csrc/difftest/checkers/load.cpp
+131 −0		src/test/csrc/difftest/checkers/refill.cpp
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+237 −0		src/test/csrc/difftest/checkers/tlb.cpp
+152 −0		src/test/csrc/difftest/checkers/traps.cpp
+90 −0		src/test/csrc/difftest/diffstate.cpp
+199 −0		src/test/csrc/difftest/diffstate.h
+203 −1,334		src/test/csrc/difftest/difftest.cpp
+52 −316		src/test/csrc/difftest/difftest.h
+39 −38		src/test/csrc/difftest/refproxy.cpp
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+19 −319		src/test/csrc/emu/emu.cpp
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+74 −55		src/test/csrc/vcs/vcs_main.cpp
+1 −0		src/test/scala/DifftestMain.scala
+37 −37		src/test/scala/DifftestTop.scala
+1 −1		src/test/vsrc/fpga_sim/xdma_axi.v
+1 −1		src/test/vsrc/fpga_sim/xdma_wrapper.v
+1 −1		src/test/vsrc/vcs/DeferredControl.v
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