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Add Basil bus checker#275

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bus-checker
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Add Basil bus checker#275
kcaisley wants to merge 3 commits into
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bus-checker

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@kcaisley

@kcaisley kcaisley commented May 27, 2026

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So I took another stab at building the Basil bus checker. This version is mostly generated as well, but is a lot more clear/simple.

Closes #268

@kcaisley

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Here's some examples of running it, across obelix, tj-monopix2, frida, and rd53.

python -m basil.utils.buscheck ../obelix1-daq/obelix1/system/DAQ.yaml ../obelix1-daq/firmware/src/obelix1.v ../obelix1-daq/firmware/src/obelix1_core.v ../obelix1-daq/obelix1/tests/test_hardware/tb_obelix_and_daq.sv
YAML:
                   0x1000  rx                               obelix1.system.obelix1_rx    ../obelix1-daq/obelix1/system/DAQ.yaml
                   0x2000  ttt                              obelix1.system.obelix1_ttt   ../obelix1-daq/obelix1/system/DAQ.yaml
                   0x3000  cmd                              obelix1.system.cmd           ../obelix1-daq/obelix1/system/DAQ.yaml
                   0x8000  FIFO                             bram_fifo                    ../obelix1-daq/obelix1/system/DAQ.yaml
               0x80000000  FIFO:data                        bram_fifo                    ../obelix1-daq/obelix1/system/DAQ.yaml
Verilog:
                 0x0-0xff  inst_bus_to_ip                   bus_to_ip                    ../obelix1-daq/firmware/src/obelix1_core.v:97
              0x100-0x2ff  inst_reset_logic                 reset_logic                  ../obelix1-daq/firmware/src/obelix1_core.v:146
            0x1000-0x10ff  inst_obelix1_rx[rx_mod=0]        obelix1_rx                   ../obelix1-daq/firmware/src/obelix1_core.v:223
            0x2000-0x20ff  inst_obelix1_ttt[ttt_mod=0]      obelix1_ttt                  ../obelix1-daq/firmware/src/obelix1_core.v:261
            0x3000-0x4fff  inst_cmd_encoder                 cmd                          ../obelix1-daq/firmware/src/obelix1_core.v:163
            0x4000-0x4fff  inst_i2c                         i2c                          ../obelix1-daq/firmware/src/obelix1.v:404
            0x8000-0x8fff  i_out_fifo                       bram_fifo                    ../obelix1-daq/obelix1/tests/test_hardware/tb_obelix_and_daq.sv:109
    0x80000000-0x90000000  i_out_fifo:data                  bram_fifo                    ../obelix1-daq/obelix1/tests/test_hardware/tb_obelix_and_daq.sv:109
Problems:
  - Verilog overlap: inst_i2c 0x4000-0x4fff overlaps inst_cmd_encoder 0x3000-0x4fff
  - missing in YAML: inst_i2c 0x4000-0x4fff
  - missing in YAML: inst_bus_to_ip 0x0-0xff
  - missing in YAML: inst_reset_logic 0x100-0x2ff
python -m basil.utils.buscheck ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v
YAML:
                     0x10  gpio                             gpio                         ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                    0x300  system                           tjmonopix2.system.board      ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                    0x400  rst                              pulse_gen                    ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                    0x500  gpio_daq_control                 gpio                         ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                    0x600  tlu                              tlu                          ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                    0x700  tdc                              tdc_s3                       ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                    0x800  tlu_veto                         pulse_gen                    ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                    0x900  gpio_xadc_vpvn                   gpio                         ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                    0xa00  gpio_xadc_fpga_temp              gpio                         ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                    0xc00  pulser_cmd_start_loop            pulse_gen                    ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                   0x2000  cmd                              tjmonopix2.system.cmd        ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
                   0x4000  i2c                              i2c                          ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
              0x100000000  FIFO:data                        sitcp_fifo                   ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
              0x200000000  FIFO                             sitcp_fifo                   ../tj-monopix2-daq/tjmonopix2/system/bdaq53.yaml
Verilog:
                0x10-0xff  gpio_i                           gpio                         ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:250
              0x300-0x3ff  i_bus_to_ip_daq                  bus_to_ip                    ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:208
              0x400-0x4ff  pulse_gen_rst                    pulse_gen                    ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:373
              0x500-0x5ff  i_gpio_control                   gpio                         ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:289
              0x600-0x6ff  i_tlu_controller                 tlu_controller               ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:533
              0x700-0x7ff  i_tdc                            tdc_s3                       ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:604
              0x800-0x8ff  i_pulse_gen_veto                 pulse_gen                    ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:583
              0x900-0x9ff  i_gpio_xadc_vpvn                 gpio                         ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:327
              0xa00-0xaff  i_gpio_xadc_fpga_temp            gpio                         ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:309
              0xc00-0xcff  i_pulse_gen_cmd_start_loop       pulse_gen                    ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:474
            0x2000-0x3fff  i_cmd                            cmd                          ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:436
            0x4000-0x4fff  i_i2c                            i2c                          ../tj-monopix2-daq/firmware/src/tjmonopix2_core.v:406
Problems:
  - missing in Verilog: FIFO 0x200000000
  - missing in Verilog: FIFO:data 0x100000000
python -m basil.utils.buscheck ../frida/flow/scans/map_fpga.yaml ../frida/design/fpga/daq_core.v
YAML:
                  0x10000  seq0                             seq_gen                      ../frida/flow/scans/map_fpga.yaml
                  0x20000  spi0                             spi                          ../frida/flow/scans/map_fpga.yaml
                  0x30000  gpio0                            gpio                         ../frida/flow/scans/map_fpga.yaml
                  0x40000  fastrx0                          fast_spi_rx                  ../frida/flow/scans/map_fpga.yaml
Verilog:
          0x10000-0x1ffff  inst_seq_gen                     seq_gen                      ../frida/design/fpga/daq_core.v:131
          0x20000-0x200ff  inst_spi                         spi                          ../frida/design/fpga/daq_core.v:164
          0x30000-0x300ff  inst_gpio                        gpio                         ../frida/design/fpga/daq_core.v:210
          0x40000-0x400ff  inst_fast_spi_rx                 fast_spi_rx                  ../frida/design/fpga/daq_core.v:248
Address maps match.
python -m basil.utils.buscheck ../bdaq53/bdaq53/system/bdaq53.yaml ../bdaq53/firmware/src/bdaq53.v ../bdaq53/firmware/src/bdaq53_core.v
YAML:
                      0x0  system                           bdaq53.system.board          ../bdaq53/bdaq53/system/bdaq53.yaml
                    0x600  tlu                              tlu                          ../bdaq53/bdaq53/system/bdaq53.yaml
                    0x700  pulser_trig                      pulse_gen                    ../bdaq53/bdaq53/system/bdaq53.yaml
                    0x800  pulser_veto                      pulse_gen                    ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x1000  i2c                              i2c                          ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x1e00  gpio_dm                          gpio                         ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x1f00  gpio_xadc_vpvn                   gpio                         ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x2000  gpio_xadc_fpga_temp              gpio                         ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x2100  gpio_bdaq_control                gpio                         ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x2300  pulse_gen_az                     pulse_gen                    ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x2400  tdc_hitor0                       tdc_s3                       ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x2500  tdc_hitor1                       tdc_s3                       ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x2600  tdc_hitor2                       tdc_s3                       ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x2700  tdc_hitor3                       tdc_s3                       ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x2800  pulser_cmd_start_loop            pulse_gen                    ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x2900  pulser_ext_trig                  pulse_gen                    ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x3000  pulser_lpmode                    pulse_gen                    ../bdaq53/bdaq53/system/bdaq53.yaml
                   0x9000  cmd                              bdaq53.system.bdaq53_driver  ../bdaq53/bdaq53/system/bdaq53.yaml
              0x100000000  FIFO:data                        sitcp_fifo                   ../bdaq53/bdaq53/system/bdaq53.yaml
              0x200000000  FIFO                             sitcp_fifo                   ../bdaq53/bdaq53/system/bdaq53.yaml
Verilog:
                0x0-0x100  i_bus_to_ip_bdaq                 bus_to_ip                    ../bdaq53/firmware/src/bdaq53_core.v:330
              0x600-0x6ff  i_tlu_controller                 tlu_controller               ../bdaq53/firmware/src/bdaq53_core.v:736
              0x700-0x7ff  i_pulse_gen_trig                 pulse_gen                    ../bdaq53/firmware/src/bdaq53_core.v:536
              0x800-0x8ff  i_pulse_gen_veto                 pulse_gen                    ../bdaq53/firmware/src/bdaq53_core.v:787
            0x1000-0x10ff  i_i2c                            i2c                          ../bdaq53/firmware/src/bdaq53_core.v:512
            0x1e00-0x1eff  i_gpio_data_merging              gpio                         ../bdaq53/firmware/src/bdaq53_core.v:1048
            0x1f00-0x1fff  i_gpio_xadc_vpvn                 gpio                         ../bdaq53/firmware/src/bdaq53_core.v:463
            0x2000-0x20ff  i_gpio_xadc_fpga_temp            gpio                         ../bdaq53/firmware/src/bdaq53_core.v:445
            0x2100-0x21ff  i_gpio_control                   gpio                         ../bdaq53/firmware/src/bdaq53_core.v:427
            0x2200-0x22ff  i_spi                            spi                          ../bdaq53/firmware/src/bdaq53_core.v:391
            0x2300-0x23ff  i_pulse_gen_az                   pulse_gen                    ../bdaq53/firmware/src/bdaq53_core.v:593
            0x2400-0x24ff  i_tdc                            tdc_s3                       ../bdaq53/firmware/src/bdaq53_core.v:813
            0x2500-0x25ff  i_tdc[i=1]                       tdc_s3                       ../bdaq53/firmware/src/bdaq53_core.v:856
            0x2600-0x26ff  i_tdc[i=2]                       tdc_s3                       ../bdaq53/firmware/src/bdaq53_core.v:856
            0x2700-0x27ff  i_tdc[i=3]                       tdc_s3                       ../bdaq53/firmware/src/bdaq53_core.v:856
            0x2800-0x28ff  i_pulse_gen_cmd_start_loop       pulse_gen                    ../bdaq53/firmware/src/bdaq53_core.v:669
            0x2900-0x2fff  i_pulse_gen_ext_trig             pulse_gen                    ../bdaq53/firmware/src/bdaq53_core.v:556
            0x3000-0x30ff  i_pulse_gen_lp                   pulse_gen                    ../bdaq53/firmware/src/bdaq53_core.v:574
            0x6000-0x60ff  i_aurora_rx                      rx_aurora_64b66b             ../bdaq53/firmware/src/bdaq53_core.v:948
            0x9000-0xafff  i_cmd_rd53                       cmd_rd53                     ../bdaq53/firmware/src/bdaq53_core.v:620
Problems:
  - missing in Verilog: FIFO 0x200000000
  - missing in Verilog: FIFO:data 0x100000000
  - missing in YAML: i_spi 0x2200-0x22ff
  - missing in YAML: i_aurora_rx 0x6000-0x60ff

@kcaisley kcaisley requested a review from cbespin May 27, 2026 18:50
@kcaisley kcaisley mentioned this pull request May 27, 2026
@kcaisley kcaisley self-assigned this May 27, 2026
@cbespin

cbespin commented May 29, 2026

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This looks very nice! I have a few points that I want to check before merging, but one thing already:
modules that are missing in the yaml should not be considered a problem (with exit code 1), as it is not a problem, but sometimes an intended "feature" (when accessing the bus directly, for example). Maybe raising a warning or similar is better, especially when running this in a CI pipeline.

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Bus address map

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