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drivers/pci: Calculate PCI bar size use mask 0xffffffff #17373
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pci: Calculate PCI bar size use mask 0xffffffff Signed-off-by: lipengfei28 <[email protected]>
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jerpelea
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please change commit title to
drivers/pci: Calculate PCI bar size use mask 0xffffffff
jerpelea
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please update PR message to describe the change!
linguini1
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Why is this change necessary? Your PR description contains no helpful information, please update it according to the template.
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Please provide an actual test case instead of just the command invoked to launch QEMU. |
Summary
pci: Calculate PCI bar size use mask 0xffffffff
This is the description from the PCIe specification:
5.0-1.0-PUB —PCI Express® Base Specification Revision 5.0 Version 1.0
Decode (I/O or memory) of the appropriate address space is disabled via the Command Register before sizing a
Base Address register. Software saves the original value of the Base Address register, writes a value of all 1's to the
register, then reads it back. Size calculation can be done from the 32 bit value read by first clearing encoding
information bits (bits 1:0 for I/O, bits 3:0 for memory), inverting all 32 bits (logical NOT), then incrementing by 1.
The resultant 32-bit value is the memory/I/O range size decoded by the register. Note that the upper 16 bits of the
result is ignored if the Base Address register is for I/O and bits 31:16 returned zero upon read. The original value in
the Base Address register is restored before re-enabling decode in the Command Register of the Function.
64-bit (memory) Base Address registers can be handled the same, except that the second 32 bit register is
considered an extension of the first (i.e., bits 63:32). Software writes a value of all 1's to both registers, reads them
back, and combines the result into a 64-bit value. Size calculation is done on the 64-bit value.
Impact
Impact on pcie driver
Calculate PCI bar size use mask 0xffffffff,According to the PCI Express specification
Testing
qemu-system-aarch64 -L /home/shanmin/aosp/emu-35-5-release/external/qemu/objs/distribution/emulator/lib/pc-bios -cpu cortex-a53 -nographic -machine virt,virtualization=on,gic-version=3 -nographic -object memory-backend-file,discard-data=on,id=shmmem-shmem0,mem-path=/dev/shm/my_shmem0,size=4194304,share=yes -device ivshmem-plain,id=shmem0,memdev=shmmem-shmem0,addr=0xb -kernel /home/shanmin/aosp/android15-qpr2-release/out/target/product/emu64x/nuttx
Result : the pcie drvier can get correct bar size