Track the assembler ISA ceiling in version pins and golden headers - #150
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The ptxas tier hardcoded the emitted module version (.version 9.3) in the TMA prefetch pins and in the golden baselines, and excluded the two 9.4 add.noftz.f32 vector forms behind a static floor. All three now follow the managed assembler's negotiated ISA, the way the corpus tiers already do: the TMA pins assert the toolkit-negotiated version, golden comparison stamps the baseline header to the active ceiling (every other byte stays an exact structural lock), and the vector-result spelled-only exclusion lifts when the assembler accepts ISA 9.4, with skip and partition counts pinned per ceiling. Under the shipped CUDA 13.3 the suites pass unchanged (502); under the CUDA 13.4 developer preview (set_runtime_version! opt-in) the two noftz forms assemble and the suites pass at 504. First mechanical unlock of issue #107 gate G1. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01NWqg2Wpe39TyDWFgm5KEya
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First mechanical unlock of #107 gate [G1], staged so CI needs nothing: the ptxas-tier expectations that hardcoded the emitted PTX module version now follow the managed assembler's negotiated ISA, the way the corpus tiers already auto-track
_PTXAS_ISA.test/ptxas/tma_prefetch.jl,test/ptxas/tma_im2col_prefetch.jl— the.version 9.3pins become assertions on the toolkit-negotiated ISA (13.3 → 9.3, 13.4 → 9.4).test/setup.jl—golden_teststamps the committed baseline's.versionheader to the active assembler's ISA before comparing. The header is a toolkit stamp, not lowering evidence; every other byte of all 18 goldens remains an exact structural lock, and no golden files change in this PR.test/ptxas/vector_results.jl— the spelled-only exclusion (_VR_SPELLED_ONLY_FLOOR) becomes ceiling-tracking, resolved once at file load because the partition bodies are built during@generatedexpansion. Skip and partition counts stay double-entered, pinned per ceiling: 2 skipped /:atom90= 32 under a 9.3 assembler, 0 skipped / 34 under 9.4.Evidence: under CUDA 13.3 (what CI resolves) the four affected suites pass unchanged, 502 tests. Under the CUDA 13.4 developer preview (
set_runtime_version!opt-in; ptxas 13.4.46 accepts ISA 9.4 and carries sm_107a/f backends) they pass at 504 — the two 9.4add.noftz.f32vector forms assemble at sm_90, their first offline-compiler evidence. When a 13.4+ artifact ships through CUDACore as the default, these gates lift on their own; SURFACE disposition upgrades are deferred to that point.🤖 Generated with Claude Code
https://claude.ai/code/session_01NWqg2Wpe39TyDWFgm5KEya