Dc components

config/cmake/addSundials.cmake

@@ -146,6 +146,18 @@ set(SUNDIALS_TEST_ENABLE_UNIT_TESTS OFF CACHE INTERNAL "")
 set(SUNDIALS_TEST_ENABLE_DIFF_OUTPUT OFF CACHE INTERNAL "")
 set(SUNDIALS_TEST_ANSWER_DIR "" CACHE INTERNAL "")
 
+# SUNDIALS defaults this Podman-specific argument even when it discovers and uses Docker.  Docker
+# rejects --tls-verify, so clear the optional container arguments before SUNDIALS creates its
+# local-CI helper targets.  GridDyn does not use those targets for its normal build or test flow.
+set(SUNDIALS_TEST_CONTAINER_RUN_EXTRA_ARGS ""
+    CACHE STRING "Extra arguments to pass to Docker/Podman for SUNDIALS local CI targets" FORCE
+)
+
+option(GRIDDYN_ENABLE_SUNDIALS_LOCAL_CI
+       "Include SUNDIALS Docker/Podman local-CI helper targets in the Visual Studio solution build"
+       OFF
+)
+
 if(${PROJECT_NAME}_ENABLE_OPENMP_SUNDIALS)
     set(SUNDIALS_ENABLE_OPENMP ON CACHE INTERNAL "")
 endif()
@@ -166,6 +178,28 @@ endif()
 
 add_subdirectory("${sundials_SOURCE_DIR}" "${sundials_BINARY_DIR}")
 
+# SUNDIALS creates these developer-only targets whenever Docker or Podman is discovered.  They are
+# not part of GridDyn's test suite and must not start a container as a side effect of Visual
+# Studio's Build Solution command.
+if(NOT GRIDDYN_ENABLE_SUNDIALS_LOCAL_CI)
+    string(TOLOWER "${SUNDIALS_PRECISION}" _griddyn_sundials_precision)
+    foreach(_griddyn_sundials_local_ci_target
+            setup_local_ci test_local_ci
+            setup_local_ci_${SUNDIALS_INDEX_SIZE}_${_griddyn_sundials_precision}
+            test_local_ci_${SUNDIALS_INDEX_SIZE}_${_griddyn_sundials_precision}
+    )
+        if(TARGET ${_griddyn_sundials_local_ci_target})
+            set_property(
+                TARGET ${_griddyn_sundials_local_ci_target} PROPERTY EXCLUDE_FROM_DEFAULT_BUILD
+                                                                     TRUE
+            )
+            set_property(TARGET ${_griddyn_sundials_local_ci_target} PROPERTY EXCLUDE_FROM_ALL TRUE)
+        endif()
+    endforeach()
+    unset(_griddyn_sundials_precision)
+    unset(_griddyn_sundials_local_ci_target)
+endif()
+
 if(NOT MSVC)
     set(CMAKE_C_FLAGS "${_griddyn_saved_c_flags}")
     set(CMAKE_CXX_FLAGS "${_griddyn_saved_cxx_flags}")

config/cmake/compiler_flags.cmake

@@ -129,7 +129,13 @@ if(MSVC)
     add_compile_options(/EHsc /MP /utf-8)
     target_compile_options(build_flags_target INTERFACE /EHsc /utf-8)
 
-    target_link_options(compile_flags_target INTERFACE /debug:fastlink /incremental)
+    # VS 2026 (MSVC 19.50+) removed /DEBUG:FASTLINK.  Newer linkers select full debug information
+    # when /DEBUG is enabled, while /INCREMENTAL remains supported.
+    if(MSVC_VERSION LESS 1950)
+        target_link_options(compile_flags_target INTERFACE /debug:fastlink /incremental)
+    else()
+        target_link_options(compile_flags_target INTERFACE /incremental)
+    endif()
     if(${PROJECT_NAME}_ENABLE_EXTRA_COMPILER_WARNINGS)
         target_compile_options(compile_flags_target INTERFACE /W4 /sdl /wd4244)
     endif(${PROJECT_NAME}_ENABLE_EXTRA_COMPILER_WARNINGS)

docs/developer-guide/activsg-dyr-compatibility-plan.md

@@ -108,20 +108,32 @@ is required before accepting the power flow or initializing the DYR.
 
 ## Implementation order
 
+The cross-case source availability and P1/P2 ranking is maintained in the
+[OpenIPSL dynamic-model assessment](openipsl-compatibility.md#synthetic-case-demand-overlay).
+That overlay distinguishes models that can be ported from an inspected
+OpenIPSL/ANDES/PowerDynamics implementation from source gaps that require
+equations before implementation.
+
 1. **Power-flow prerequisites:** resolve the remaining ACTIVSg2000
    control-device parity difference, add grouped PSS/E remote-voltage
    regulation, and investigate the ACTIVSg25k RAW-versus-MATPOWER source-state
    mismatch. ACTIVSg10k RAW/EPC three-winding topology is validated.
-2. **Machine and governor coverage:** implement `GENSAL`, `GGOV1`, `HYGOV`,
-   and `GAST`. These cover 15,151 unsupported records and unblock many of
-   their attached excitation/control models.
-3. **Largest synchronous-excitation gap:** implement `ESST4B`, `IEEET1`,
-   `SCRX`, and `EXPIC1` (11,578 records).
-4. **Renewable generation:** implement and validate `REGCA1` plus `REECA1`,
-   then the coupled `WT3G1`/`WT3E1`/`WT3P1`/`WT3T1` Type-3 system (5,150
-   records).
-5. **Remaining excitation families:** `ESDC2A`, `ESAC6A`, and `ESAC1A`
-   (1,919 records).
+2. **P1 conventional machine/governor foundation:** implement `GENSAL`,
+   `HYGOV`, and `GGOV1`. These high-demand models have external equation
+   sources; `GGOV1` is the largest missing family and its PowerDynamics port
+   is experimental, so use OpenIPSL as the equation authority.
+3. **P1 synchronous excitation:** implement `ESST4B`, `IEEET1`, and `SCRX`
+   from the available OpenIPSL/PowerDynamics references. Defer `EXPIC1` to P2
+   because no exact source was found; ANDES's `SEXS` conversion is only an
+   approximation.
+4. **P1 renewable generation:** implement and validate `REGCA1` plus
+   `REECA1` (and `REPCA1` for Texas7k), then the coupled
+   `WT3G1`/`WT3E1`/`WT3P1`/`WT3T1` Type-3 system. The latter two models have
+   no exact external source and must be derived or obtained as part of the
+   complete system, not silently omitted.
+5. **P2 remaining excitation/source gaps:** `ESDC2A` and `ESAC1A` have
+   OpenIPSL references; `ESAC6A` requires an exact equation source before a
+   port. Add `EXPIC1` only after its exact behavior is obtained.
 6. **Reader and validation hardening:** table-driven DYR dispatch, strict
    unknown-model diagnostics, exact bus-plus-machine-ID resolution, minimized
    fixtures, and whole-case trajectory regressions.