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Merged
phsauter merged 6 commits into from
Aug 6, 2026
Merged

xilinx: Add support for Digilent Basys3 board #130

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af74bac
[basys3] basic BASYS3 setup
FrancescoConti Jun 23, 2026
faaa493
[basys3] route JTAG through BSCANE2 USER3/USER4, drop PMOD pins
FrancescoConti Jun 23, 2026
a195b18
[basys3] fix bender flist to select dmi_bscane_tap via xilinx+bscane …
FrancescoConti Jun 23, 2026
753605e
Fix openocd script for BASYS3 (at least for riscv-openocd Open On-Chi…
FrancescoConti Jun 23, 2026
ae814b4
[xilinx] Add IIS environment guard to run_xilinx.sh
FrancescoConti Jun 26, 2026
e8510ff
[basys3] per-board clkwiz config and bender pass_targets
FrancescoConti Aug 4, 2026
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3 changes: 2 additions & 1 deletion Bender.lock
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Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,8 @@ packages:
version: null
source:
Path: rtl/cve2
dependencies: []
dependencies:
- common_cells
idma:
revision: null
version: null
Expand Down
8 changes: 6 additions & 2 deletions Bender.yml
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Expand Up @@ -11,7 +11,11 @@ dependencies:
# IMPORTANT: see vendor_package at the bottom
common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 1.39.0 }
common_verification: { git: "https://github.com/pulp-platform/common_verification.git", rev: 5fd30c1 } # 0.2.5+
riscv-dbg: { git: "https://github.com/pulp-platform/riscv-dbg.git", rev: "verilator-phsauter" }
riscv-dbg:
git: "https://github.com/pulp-platform/riscv-dbg.git"
rev: "verilator-phsauter"
pass_targets:
- { target: basys3, pass: bscane }
tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", rev: fca524a } # 0.2.13+
apb: { git: "https://github.com/pulp-platform/apb.git", version: 0.2.4 }
obi: { git: "https://github.com/pulp-platform/obi.git", rev: 6a724da } # 0.1.7+
Expand Down Expand Up @@ -69,7 +73,7 @@ sources:
- rtl/test/croc_vip.sv
- rtl/test/tb_croc_soc.sv

- target: genesys2
- target: any(genesys2, basys3)
files:
- xilinx/hw/croc_xilinx.sv
- xilinx/hw/fan_ctrl.sv
Expand Down
31 changes: 31 additions & 0 deletions xilinx/hw/croc_xilinx.sv
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Expand Up @@ -10,6 +10,7 @@
// Philippe Sauter <phsauter@iis.ee.ethz.ch>

`ifdef TARGET_GENESYS2
`define USE_DIFFERENTIAL_CLOCK
`define USE_RESETN
`define USE_JTAG_TRSTN
`define USE_STATUS
Expand All @@ -19,6 +20,14 @@
`define USE_VIO
`endif

`ifdef TARGET_BASYS3
`define USE_RESET
`define USE_STATUS
`define USE_SWITCHES
`define USE_LEDS
`define USE_VIO
`endif

`define ILA(__name, __signal) \
(* dont_touch = "yes" *) (* mark_debug = "true" *) logic [$bits(__signal)-1:0] __name; \
assign __name = __signal;
Expand All @@ -27,7 +36,9 @@ module croc_xilinx import croc_pkg::*; #(
localparam int unsigned GpioCount = 4
) (
input logic sys_clk_p,
`ifdef USE_DIFFERENTIAL_CLOCK
input logic sys_clk_n,
`endif

`ifdef USE_RESET
input logic sys_reset,
Expand All @@ -48,6 +59,7 @@ module croc_xilinx import croc_pkg::*; #(
output logic status_o,
`endif

`ifndef TARGET_BASYS3
input logic jtag_tck_i,
input logic jtag_tms_i,
input logic jtag_tdi_i,
Expand All @@ -59,6 +71,7 @@ module croc_xilinx import croc_pkg::*; #(
output logic jtag_vdd_o,
output logic jtag_gnd_o,
`endif
`endif // TARGET_BASYS3

`ifdef USE_FAN
input logic [2:0] fan_sw, // switch 4-6
Expand All @@ -76,13 +89,22 @@ module croc_xilinx import croc_pkg::*; #(
wire sys_clk;
wire soc_clk;

`ifdef USE_DIFFERENTIAL_CLOCK
IBUFDS #(
.IBUF_LOW_PWR ("FALSE")
) i_bufds_sys_clk (
.I ( sys_clk_p ),
.IB ( sys_clk_n ),
.O ( sys_clk )
);
`else
IBUF #(
.IBUF_LOW_PWR ("FALSE")
) i_buf_sys_clk (
.I ( sys_clk_p ),
.O ( sys_clk )
);
`endif

clkwiz i_clkwiz (
.clk_in1 ( sys_clk ),
Expand Down Expand Up @@ -177,6 +199,14 @@ module croc_xilinx import croc_pkg::*; #(
// JTAG //
////////////

`ifdef TARGET_BASYS3
// BSCANE2 mode: no external pins; dmi_bscane_tap drives through config JTAG
logic jtag_tck_i, jtag_tms_i, jtag_tdi_i, jtag_tdo_o, jtag_trst_ni;
assign jtag_tck_i = '0;
assign jtag_tms_i = '0;
assign jtag_tdi_i = '0;
assign jtag_trst_ni = '1;
`else
`ifdef USE_JTAG_VDDGND
assign jtag_vdd_o = 1'b1;
assign jtag_gnd_o = 1'b0;
Expand All @@ -185,6 +215,7 @@ module croc_xilinx import croc_pkg::*; #(
logic jtag_trst_ni;
assign jtag_trst_ni = 1'b1;
`endif
`endif // TARGET_BASYS3


/////////////////////////
Expand Down
82 changes: 51 additions & 31 deletions xilinx/run_xilinx.sh
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Expand Up @@ -17,13 +17,15 @@ set -u # Error on undefined vars
# Source environment
source "../env.sh"

VIVADO=${VIVADO:-"vitis-2022.1 vivado"}
Comment thread
FrancescoConti marked this conversation as resolved.
# Select IIS-internal tool commands if we run on IIS machines
if [ -f /etc/iis.version ]; then
VIVADO=${VIVADO:-"vitis-2022.1 vivado"}
else
VIVADO=${VIVADO:-"vivado"}
fi

mkdir -p build
mkdir -p out
mkdir -p build/genesys2.clkwiz
mkdir -p build/genesys2.vio
mkdir -p build/genesys2.croc


################
Expand All @@ -38,17 +40,19 @@ Usage:
./run_xilinx.sh [OPTIONS]

Options:
--help, -h Show this help message
--dry-run, -n Only print commands instead of executing
--verbose, -v Print commands while executing
--flist Regenerate compile script reading sources (add_sources.genesys2.tcl)
--clkwiz Implement build/genesys2.clkwiz
--vio Implement build/genesys2.vio
--croc Implement Croc SoC only
--all Implement clkwiz, vio, and Croc SoC
--help, -h Show this help message
--dry-run, -n Only print commands instead of executing
--verbose, -v Print commands while executing
--target <board> Target board: genesys2 (default), basys3
--flist Regenerate compile script reading sources
--clkwiz Implement clock wizard IP
--vio Implement VirtualIO IP
--croc Implement Croc SoC only
--all Implement clkwiz, vio, and Croc SoC

Example:
./run_xilinx.sh --all
./run_xilinx.sh --target basys3 --all

EOF
exit 0
Expand All @@ -65,44 +69,47 @@ run_cmd() {


generate_flist() {
run_cmd "echo [INFO][Bender] Generate add_sources.genesys2.tcl"
run_cmd "echo [INFO][Bender] Generate add_sources.${TARGET}.tcl"
run_cmd "bender \
script vivado \
-t genesys2 \
-t ${TARGET} \
-t synthesis \
-D COMMON_CELLS_ASSERTS_OFF=1 \
> scripts/add_sources.genesys2.tcl"
> scripts/add_sources.${TARGET}.tcl"

run_cmd "echo [INFO][Bender] Remove absolute paths"
run_cmd "sed -i 's|${CROC_ROOT}|../../..|g' scripts/add_sources.genesys2.tcl"
run_cmd "sed -i 's|${CROC_ROOT}|../../..|g' scripts/add_sources.${TARGET}.tcl"

run_cmd "echo [INFO][Bender] File list generated: add_sources.genesys2.tcl"
run_cmd "echo [INFO][Bender] File list generated: add_sources.${TARGET}.tcl"
}


impl_clockwiz() {
run_cmd "echo [INFO][VIVADO] Implement clock wizard IP"
run_cmd "cd build/genesys2.clkwiz"
mkdir -p build/${TARGET}.clkwiz
run_cmd "echo [INFO][VIVADO] Implement clock wizard IP [${TARGET}]"
run_cmd "cd build/${TARGET}.clkwiz"
run_cmd "${VIVADO} -mode batch -source ../../scripts/impl_ip.tcl \
-tclargs genesys2 clkwiz > ../../clkwiz.log"
-tclargs ${TARGET} clkwiz > ../../clkwiz.${TARGET}.log"
run_cmd "cd ../.."
}


impl_vio() {
run_cmd "echo [INFO][VIVADO] Implement VirtualIO IP"
run_cmd "cd build/genesys2.vio"
mkdir -p build/${TARGET}.vio
run_cmd "echo [INFO][VIVADO] Implement VirtualIO IP [${TARGET}]"
run_cmd "cd build/${TARGET}.vio"
run_cmd "${VIVADO} -mode batch -source ../../scripts/impl_ip.tcl \
-tclargs genesys2 vio > ../../vio.log"
-tclargs ${TARGET} vio > ../../vio.${TARGET}.log"
run_cmd "cd ../.."
}


impl_croc(){
run_cmd "echo [INFO][VIVADO] Implement Croc"
run_cmd "cd build/genesys2.croc"
impl_croc() {
mkdir -p build/${TARGET}.croc
run_cmd "echo [INFO][VIVADO] Implement Croc [${TARGET}]"
run_cmd "cd build/${TARGET}.croc"
run_cmd "${VIVADO} -mode batch -source ../../scripts/impl_sys.tcl \
-tclargs genesys2 croc ../genesys2.clkwiz/out.xci ../genesys2.vio/out.xci > ../../croc.log"
-tclargs ${TARGET} croc ../${TARGET}.clkwiz/out.xci ../${TARGET}.vio/out.xci > ../../croc.${TARGET}.log"
run_cmd "cd ../.."
}

Expand All @@ -112,19 +119,27 @@ impl_croc(){
####################

DRYRUN=0
TARGET="genesys2"

# default action if no argument is given
if [ $# -eq 0 ]; then
show_help
return 0
fi

# check for global arguments
for arg in "$@"; do
[[ "$arg" == -v || "$arg" == --verbose ]] && set -x
[[ "$arg" == -n || "$arg" == --dry-run ]] && DRYRUN=1
# check for global arguments (first pass, order-independent)
args=("$@")
for ((i=0; i<${#args[@]}; i++)); do
[[ "${args[i]}" == -v || "${args[i]}" == --verbose ]] && set -x
[[ "${args[i]}" == -n || "${args[i]}" == --dry-run ]] && DRYRUN=1
[[ "${args[i]}" == --target ]] && TARGET="${args[i+1]}"
done

case "$TARGET" in
genesys2|basys3) ;;
*) echo "[ERROR] Unknown target: $TARGET (expected genesys2 or basys3)" >&2; exit 1 ;;
esac

# parse arguments
while [[ $# -gt 0 ]]; do
case "$1" in
Expand All @@ -137,6 +152,10 @@ while [[ $# -gt 0 ]]; do
--dry-run|-n)
shift
;;
--target)
TARGET="$2"
shift 2
;;
# script-specific commands
--flist)
generate_flist
Expand All @@ -155,6 +174,7 @@ while [[ $# -gt 0 ]]; do
shift
;;
--all)
generate_flist
impl_clockwiz
impl_vio
impl_croc
Expand Down
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