Add HMR unit - #35

Merged

micprog merged 66 commits into

Aug 7, 2025

Commits on Aug 7, 2025

HMR: Add initial wrapper structure
micprog
committed
1f3240c
Integrated ECC-protected Recovery RF.
micprog
committed
3fd6d90
Fix TMR and DMR assignments
micprog
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dd734c0
Add RapidRecovery parameter to en-/disable backup RF
micprog
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e1cbb4b
Added clock gating to lock unfaulty cores during recovery routine.

Yvan Tortorella
authored and
micprog
committed
c577999
Add parameter documentation
micprog
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256a2cb
Update TMR signalling
micprog
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28eb908
Update signal alignments
micprog
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c8eada6
Add individual dmr controller (separated rapid-recovery)
micprog
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ee3ede5
Add dmr and rapid-recovery configuration registers
micprog
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5fe050e
Update header file generation
micprog
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47240d9
Fix configurable rapid-recovery assignments
micprog
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97dfe42
Fix connections for rapid-recovery
micprog
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1ec034f
Generating correct offsets in RF address generator.

Yvan Tortorella
authored and
micprog
committed
eefb04a
Properly connecting rapid recovery controller signals to recovery PC.

Yvan Tortorella
authored and
micprog
committed
a13cb88
Update shared_id selection for only TMR support
micprog
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25ae502
Add synch request signals
micprog
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460a50d
Move SP store reg from tmr to core registers
micprog
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aca5789
Merged CSRs backup and recovery.
micprog
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452ecdf
Add multibit setback, enable ungroup setback
micprog
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dbe9aa5
Continually back up cores in interleaved mode
micprog
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4094c7e
Fix setback signals for proper ungrouping
micprog
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48cd23b
Making cleaner assignments for main_dmr_out bus.
micprog
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31fc34f
Adding first support for TMR rapid recovery (to be fixed).
micprog
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28440dc
Ensure sw_synch interrupt stays 0 before boot
micprog
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5195870
Add response suppress module
micprog
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83c395c
TMR: only trigger a single interrupt
micprog
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580d4d4
DMR: only trigger a single interrupt
micprog
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2496a6d
TMR: buffer cores_synch signal
micprog
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fe2324f
Connect rapid recovery synch signals
micprog
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97bb5fc
HMR: fix minor DMR naming error
micprog
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00e190c
HMR: Fix DMR setback connections
micprog
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1f35ee2
Always backup when dmr/tmr is disabled
micprog
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0d33467
Update response suppression to keep req until gnt
micprog
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0afd35d
Add modular hmr unit
micprog
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7c2c616
Fix lint error
micprog
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e259fae
Fix ECC Manager configuration
micprog
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2bd1e6e
Add Corrector to generation script and update testbench

Luca Rufer
authored and
micprog
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c7aeb58
Simplify sram wrap and add optional cut to RMW path
micprog
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e516557
WIP: integrated rapid recovery unit.

Yvan Tortorella
authored and
micprog
committed
c2a42ef
Fix no-RR case
micprog
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3bae186
Fixed assignment for default status backup if cores are not grouped.

Yvan Tortorella
authored and
micprog
committed
f83e7d2
Made recovery RF FF-based.

Yvan Tortorella
authored and
micprog
committed
d349923
Use pipelined checker for core's backup bus.

Yvan Tortorella
authored and
micprog
committed
6718ee5
Store PR coming from IF stage if cores are in independent.

Yvan Tortorella
authored and
micprog
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6a3d7e6
[HMR] Fix mismatch count indexing
micprog
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3cdeb86
Create redundant groups only if redundant modes are supported.

Yvan Tortorella
authored and
micprog
committed
1fd79fc
Fix out-of-range indices when with a single DMR group.

Yvan Tortorella
authored and
micprog
committed
8eb440b
Enable usage of checkpoint register for DMR synchronization.

Yvan Tortorella
authored and
micprog
committed
0695567
Properly rename DMR registers in hmr_dmr_ctrl.

Yvan Tortorella
authored and
micprog
committed
e9d76f8
Extend checker for separate AXI bus.

Yvan Tortorella
authored and
micprog
committed
b388363
Fix AXI DMR checker.

Yvan Tortorella
authored and
micprog
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a947f51
Fix undefined assign if bus voters are not there.

Yvan Tortorella
authored and
micprog
committed
e0cdc31
Add output signal to manifest that redundancy enabled.

Yvan Tortorella
authored and
micprog
committed
99af292
Pipeline in independend backup bus whem Rapid Recovery is enabled.

Yvan Tortorella
authored and
micprog
committed
3e71f0b
Fix always comb.

Yvan Tortorella
authored and
micprog
committed
cdb82da
Add ACE buses to DMR checkers.

Yvan Tortorella
authored and
micprog
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d6b1345
Drive r/b_ready signals to default 1 for helper cores when DMR is enabled.

Yvan Tortorella
authored and
micprog
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0b18d31
Fix hmr_unit
micprog
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13e6adb
hmr_unit: remove custom AXI ports
micprog
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f587298
Add default output value parameters to allow non-zero defaults
micprog
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5c9cfbe
hmr_unit: Update doc, update status outputs
micprog
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b6a5143
Update ECC correctors
micprog
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7ebfd84
Fix lint
micprog
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c41bfbe
Fix lint
micprog
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ac3ecaf
Fix lint
micprog
committed
7a5bf5b