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58085fa
hw: Add decode support for `dminit` instruction
gbellocchi Jun 2, 2026
77cc080
sw: Add sw support for `dminit` tests
gbellocchi Jun 2, 2026
8ceb732
hw: Remove `axi_zero_mem` from `snitch_cluster`
gbellocchi Jun 2, 2026
ac20e15
hw: Update cluster and dma address map
gbellocchi Jun 2, 2026
57fb5f4
hw: Connect wide soc input to tcdm subsystem
gbellocchi Jun 2, 2026
92503d3
hw: Add obi-to-tcdm protocol converter
gbellocchi Jun 2, 2026
acc1671
hw: Add obi dma interface for tcdm subsystem
gbellocchi Jun 2, 2026
9a07527
hw: Update `NrWideMasters` in `snitch_cluster_pkg` template
gbellocchi Jun 2, 2026
7068914
bender: Add obi dependency
gbellocchi Jun 9, 2026
d3c922b
bender: Change idma deploy reference commit
gbellocchi Jun 9, 2026
fdccf94
docs: Add documentation for `dminit` custom instruction
gbellocchi Jun 9, 2026
96c613d
test: Add L1-to-L1 TCDM iDMA copy regression test
DanielKellerM Jun 15, 2026
7710da8
sw: Fix dminit opcode encoding (funct7 and rd register)
DanielKellerM Jun 15, 2026
4d0e8c2
test: Fence buffer init before the DMA in dma_dminit
DanielKellerM Jun 15, 2026
eebedeb
Merge pull request #1 from DanielKellerM/dkeller/idma-dminit-fixes
gbellocchi Jun 15, 2026
85c7778
hw: Refactor arrays in tcdm dma interconnect
gbellocchi Jun 15, 2026
f61240c
hw: Fix OBI write response deadlock in `obi_to_tcdm` bridge
gbellocchi Jun 16, 2026
f9cc6f1
util: Add `vsim-gui` runner
gbellocchi Jun 16, 2026
3bfdc22
hw: Tie off unused `obi_dma_req_o` if no dma
gbellocchi Jun 16, 2026
d787bbc
hw: Tie off undriven signals in obi-to-tcdm bridge
gbellocchi Jun 16, 2026
d99ab93
hw: Update id width on dma master side
gbellocchi Jun 16, 2026
49dc326
Bump idma deploy
gbellocchi Jun 19, 2026
6411a68
Remove occurrences of `zeromem`
gbellocchi Jun 19, 2026
26e011a
sw: Uodate `gemm` to use `dminit` memset
gbellocchi Jun 19, 2026
9ed1c71
sw: Move `zero_mem` test into deprecated
gbellocchi Jun 19, 2026
1063499
sw: Improve `dma_dminit` portability
gbellocchi Jun 19, 2026
1b7a926
sw: Fix `dma_l1l1` to allocate buffers in l1
gbellocchi Jun 19, 2026
7dcbd40
sw: Add dma test for local-to-remote tcdm transfer
gbellocchi Jun 19, 2026
d1e4164
sw: Add tls test for init and update
gbellocchi Jun 19, 2026
c85aefa
sw: Add test to assess dma traffic pattern of `snrt_init_tls`
gbellocchi Jun 19, 2026
af7b9ac
test: Update the `run.yaml` tests list
gbellocchi Jun 19, 2026
075a9e2
hw: Extend `obi_to_tcdm` with write ack and a-channel backpressure
gbellocchi Jun 19, 2026
b7cd56c
test: Remove `zeromem` from tests list
gbellocchi Jun 19, 2026
3afdeb1
Base `idma` on dummy fork to run ci tests
gbellocchi Jun 29, 2026
fd58e45
hw: Temporarily leave zero memory in hw address map
gbellocchi Jun 29, 2026
cd6f8da
test: Remove `zero_mem` from `snitch-cluster-frep-vsim`
gbellocchi Jun 29, 2026
11dfa3c
test: Temporarily remove `perf_cnt` test
gbellocchi Jun 29, 2026
eede9ba
Base `idma` on origin after `stride_t` widening fix
gbellocchi Jun 30, 2026
32a2298
hw: Extend `dma_events_t` with obi rw requests
gbellocchi Jun 30, 2026
d015a2f
hw: Update cluster peripherals with idma obi events
gbellocchi Jun 30, 2026
b23c71a
sw: Update performance counter test
gbellocchi Jun 30, 2026
2662266
deps: Bump `idma`
gbellocchi Jun 30, 2026
2fd6870
deps: Add explicit `register_interface` dependency
gbellocchi Jul 13, 2026
23f890c
Merge branch 'develop' into gb/idma_tcdm_multich_develop
gbellocchi Aug 4, 2026
de5251b
treewide: Integrate Spatz in Snitch cluster (#326)
DiyouS Aug 5, 2026
f78a978
hw: Add support for DCA with Spatz (#331)
colluca Aug 5, 2026
11fa4cc
Bump idma to latest common_cells v2 release
gbellocchi Aug 5, 2026
b0d383f
deps: Add explicit `register_interface` dependency
gbellocchi Aug 5, 2026
8eda73a
deps: Add `obi` dependency
gbellocchi Aug 5, 2026
06b2e50
hw: Fix casing mismatch for BootRom parameters
gbellocchi Aug 5, 2026
b347f51
hw: Remove hw support for `ZeroMemory` parameters
gbellocchi Aug 5, 2026
651bcd0
hw: Remove test port from `axi_to_mem_split` interface
gbellocchi Aug 5, 2026
3b49122
hw: Fix `NrWideMasters` parameter calculation
gbellocchi Aug 5, 2026
8df6656
hw: Add `xdma_mask` function into snitch cluster
gbellocchi Aug 5, 2026
fa15ca1
hw: Fix atomic parameter in `obi_to_tcdm`
gbellocchi Aug 5, 2026
7454dae
spyglass: Fix variable declaration for `enabled_dma_addr_rule`
gbellocchi Aug 5, 2026
89ba48e
ci: Enable debug mode for copift and chaining tests
gbellocchi Aug 5, 2026
379af9d
Bump `idma`
gbellocchi Aug 6, 2026
6b86a8d
sw: Add back `perf_cnt` in `frep_xs` configuration
gbellocchi Aug 7, 2026
476a892
sw: Fix linting errors
gbellocchi Aug 7, 2026
4a10de2
Merge remote-tracking branch 'pulp-github/main' into gb/idma_tcdm_mul…
gbellocchi Aug 7, 2026
c85aba7
hw: Remove deprecated parameters in `obi_to_tcdm`
gbellocchi Aug 10, 2026
99dbf0f
Fix linting errors
gbellocchi Aug 10, 2026
3e3245f
hw: Add credit-blase flow ctrl in `obi_to_tcdm`
gbellocchi Aug 10, 2026
be1b803
spyglass: Waive `idma` violations
gbellocchi Aug 11, 2026
71cab48
Bump `common_cells`
gbellocchi Aug 12, 2026
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0

name: setup-python
description: Install Python dependencies once per job, and cache across jobs
name: setup-container
description: Set up the container's Bender and Python dependencies

runs:
using: "composite"
Expand All @@ -30,6 +30,21 @@ runs:
path: ~/.cache/uv
key: uvcache-${{ hashFiles('uv.lock', '.python-version') }}

# Cache the .bender directory (checked out Bender dependencies)
- name: Cache Bender dependencies
uses: actions/cache@v4
with:
path: .bender
key: bender-${{ hashFiles('Bender.lock') }}

# In container jobs the entrypoint's `bender checkout` runs before
# actions/checkout populates the workspace, so it has no effect here and
# we need to check out Bender dependencies again after checkout.
- name: Checkout Bender dependencies
shell: sh
run: |
bender checkout

- name: Sync Python environment
shell: sh
run: |
Expand Down
96 changes: 82 additions & 14 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -37,13 +37,19 @@ jobs:
# commit on this branch: CI doesn't necessarily run on every push
# (e.g. superseded runs get cancelled), so a plain previous-commit
# diff could silently skip over a real prerequisite change.
#
# On forks, `origin` is the fork itself, whose `main` can lag behind
# the upstream repo it was forked from, so we always fetch
# `main` from the canonical upstream repo instead of `origin`.
run: |
if [ "${{ github.ref_name }}" = "main" ]; then
echo "sha=${{ github.event.before }}" >> "$GITHUB_OUTPUT"
sha="${{ github.event.before }}"
else
git fetch origin main
echo "sha=$(git merge-base origin/main HEAD)" >> "$GITHUB_OUTPUT"
git fetch https://github.com/pulp-platform/snitch_cluster.git main
sha="$(git merge-base FETCH_HEAD HEAD)"
fi
echo "sha=$sha" >> "$GITHUB_OUTPUT"
echo "Base SHA: $sha"

##########################
# Build Docker Container #
Expand Down Expand Up @@ -118,7 +124,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Build docs
run: make docs

Expand All @@ -133,7 +139,13 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
# For some reason, the checkout is done by a different user
# than that deploying to Github (root, possibly due to Docker).
# So we need to set the repository as a safe directory.
- name: Git config safe.directory
run: |
git config --global --add safe.directory $GITHUB_WORKSPACE
- name: Generate documentation sources
run: |
make doc-srcs
Expand All @@ -155,7 +167,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Run pytest
run: pytest

Expand All @@ -173,7 +185,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Hash Verilator prerequisites
id: list-make-prerequisites
uses: colluca/list-make-prerequisites@v1.0.0
Expand Down Expand Up @@ -203,7 +215,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Build Software
run: |
make sw -j
Expand Down Expand Up @@ -238,7 +250,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Hash Verilator prerequisites
id: list-make-prerequisites
uses: colluca/list-make-prerequisites@v1.0.0
Expand All @@ -260,7 +272,7 @@ jobs:
make CFG_OVERRIDE=cfg/mempool.json verilator
- name: Build Software for mempool tests
run: |
make sw CFG_OVERRIDE=cfg/mempool.json SN_MCPU=snitch-mempool -j
make sw CFG_OVERRIDE=cfg/mempool.json -j
- name: Run Tests
run: |
cd test
Expand All @@ -270,7 +282,54 @@ jobs:
# testbench does not wait until all the instructions are retired
# (compiler introduces few instructions after exit routine).
run: |
make SIM_DIR=./test/runs/simple SN_MCPU=snitch-mempool DEBUG=ON annotate -j
make SIM_DIR=./test/runs/simple DEBUG=ON annotate -j

######################################################
# Simulate SW on Snitch Cluster (Spatz) w/ Verilator #
######################################################

snitch-spatz-cluster-vlt:
name: Build and Simulate Spatz Snitch Cluster w/ Verilator
runs-on: ubuntu-22.04
needs: [docker-meta, build-hw-image]
container:
image: ${{ needs.docker-meta.outputs.hw_image_name }}
volumes:
- ${{ github.workspace }}:/repo
defaults:
run:
working-directory: /repo
steps:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-container
- name: Hash Verilator prerequisites
id: list-make-prerequisites
uses: colluca/list-make-prerequisites@v1.0.0
with:
target: verilator
flags: --recursive
- name: Set up cache for Verilator build
id: verilator-cache
uses: actions/cache@v4
with:
path: |
/repo/target/sim/build/bin
key: verilator-spatz-${{ steps.list-make-prerequisites.outputs.hash }}
restore-keys: |
verilator-spatz-
- name: Build Hardware
if: steps.verilator-cache.outputs.cache-hit != 'true'
run: |
make CFG_OVERRIDE=cfg/spatz.json verilator
- name: Build Software
run: |
make CFG_OVERRIDE=cfg/spatz.json sw -j
- name: Run Tests
run: |
cd test
../util/experiments/run.py spatz.yaml --simulator verilator -j

#############
# Synthesis #
Expand All @@ -292,10 +351,10 @@ jobs:
with:
submodules: 'recursive'
fetch-depth: 0
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Check if Yosys prerequisites changed
id: make-prerequisites-changed
uses: colluca/make-prerequisites-changed@v1.1.1
uses: colluca/make-prerequisites-changed@v1.2.0
with:
target: yosys
flags: --recursive
Expand All @@ -304,6 +363,15 @@ jobs:
if: steps.make-prerequisites-changed.outputs.changed == 'true'
run: |
make CFG_OVERRIDE=cfg/yosys-ci.json yosys
- name: Upload Yosys logs
if: failure()
uses: actions/upload-artifact@v4
with:
name: yosys-synthesis-logs
path: |
target/asic/yosys/*.log
target/asic/yosys/reports/
if-no-files-found: warn

######################
# Sources Up-to-Date #
Expand All @@ -324,7 +392,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Generate opcodes
run: |
./util/clustergen/generate-opcodes.sh
Expand Down
3 changes: 2 additions & 1 deletion .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,8 @@
!/nonfree/util/.gitignore
.cockpitgroup

# Dependency files
# Dependencies
/deps
/.bender/

# Modelsim files
Expand Down
34 changes: 20 additions & 14 deletions .gitlab-ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@

variables:
GIT_STRATEGY: clone
GIT_DEPTH: 0
# Enable colors in CI terminal
TERM: ansi
FORCE_COLOR: 1
Expand Down Expand Up @@ -108,12 +109,9 @@ snitch-ip-tests:
- snitch_cluster
- tcdm_interface
- snitch_ssr
- reqrsp_interface
script:
- make rtl -j
- cd hw/$IP
- ./util/compile.sh
- ./util/run_vsim.sh
- make test-$IP

####################
# Simulation tests #
Expand All @@ -123,15 +121,15 @@ snitch-ip-tests:
snitch-cluster-vlt:
needs: [snitch-cluster-sw]
script:
- make verilator
- make verilator TRACE=OFF -j
- cd test
- ../util/experiments/run.py run.yaml --simulator verilator -j --run-dir runs/vlt

# VCS
snitch-cluster-vcs:
needs: [snitch-cluster-sw]
script:
- make vcs
- make vcs TRACE=OFF -j
- cd test
- ../util/experiments/run.py run.yaml --simulator vcs -j --run-dir runs/vcs

Expand Down Expand Up @@ -164,53 +162,61 @@ snitch-cluster-vsim:
snitch-cluster-omega-vsim:
script:
- make CFG_OVERRIDE=cfg/omega.json sw -j
- make vsim -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py run.yaml --simulator vsim -j --run-dir runs/vsim

# Test Multi-channel DMA
snitch-cluster-mchan-vsim:
script:
- make CFG_OVERRIDE=cfg/dma_mchan.json sw -j
- make vsim -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py dma_mchan.yaml --simulator vsim -j --run-dir runs/vsim

# Test Mempool configuration
snitch-cluster-mempool-vsim:
script:
- make CFG_OVERRIDE=cfg/mempool.json SN_MCPU=snitch-mempool sw -j
- make CFG_OVERRIDE=cfg/mempool.json sw -j
- make vsim -j
- cd test
- ../util/experiments/run.py mempool.yaml --simulator vsim -j --run-dir runs/vsim
- make -C .. SIM_DIR=$PWD/runs/vsim/simple SN_MCPU=snitch-mempool annotate -j
- make -C .. SIM_DIR=$PWD/runs/vsim/simple annotate -j

# Additional tests for different FREP configurations
snitch-cluster-frep-vsim:
script:
# Large FREP configuration
- make CFG_OVERRIDE=cfg/frep_xl.json sw -j
- make vsim -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py frep_xl.yaml --simulator vsim -j --run-dir runs/vsim
- cd -
# Small FREP configuration
- make CFG_OVERRIDE=cfg/frep_xs.json sw -j
- make vsim -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py frep_xs.yaml --simulator vsim -j --run-dir runs/vsim

# Test Spatz configuration
snitch-cluster-spatz-vsim:
script:
- make CFG_OVERRIDE=cfg/spatz.json sw -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py spatz.yaml --simulator vsim -j --run-dir runs/vsim

# COPIFT experiments
snitch-cluster-copift-vsim:
script:
- make CFG_OVERRIDE=experiments/copift/cfg.json vsim -j
- make DEBUG=ON CFG_OVERRIDE=experiments/copift/cfg.json vsim -j
- cd experiments/copift
- ./experiments.py experiments.yaml --actions sw run perf -j

# Scalar chaining experiments
snitch-cluster-chaining-vsim:
script:
- make CFG_OVERRIDE=experiments/copift/cfg.json vsim -j
- make DEBUG=ON CFG_OVERRIDE=experiments/copift/cfg.json vsim -j
- cd experiments/chaining
- ./experiments.py experiments.yaml --actions sw run perf -j

Expand Down
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