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8 changes: 4 additions & 4 deletions os/OSTEP/26-concurrency-and-threads/homeworks/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ Value at 2000 changes to 1 when `%ax` is moved back to 2000 at line 8.

`./x86.py -p looping-race-nolock.s -t 2 -M 2000 -a bx=3`

Each thread keeps it own register state. So both of them loops three times.
Each thread keeps it own register state. So both of them loop three times.
The final value would be simply 6 because the interruption frequency is too high for the threads to be interrupted after register is updated but before moved back to memory.

## Question 6
Expand All @@ -48,13 +48,13 @@ mov %ax, 2000 # store it back

`./x86.py -p looping-race-nolock.s -t 2 -a bx=1 -M 2000 -i 1`

If interruption frequency is at least 3 the program will give correct result provided the program runs in a single CPU. Because length if the critical section is 3 which is at the beginning of the program.
If interruption frequency is at least 3 the program will give correct result provided the program runs in a single CPU. This is because the length of the critical section is 3 which is at the beginning of the program.

## Question 8

`./x86.py -p looping-race-nolock.s -t 2 -a bx=100 -M 2000 -i 1`

Even with higher loops, interrupt frequency 3 gives correct result. Because length of the non-critical section is 3 too.
Even with higher loops, interrupt frequency 3 gives correct result, because the length of the non-critical section is 3 too.

## Question 9

Expand All @@ -66,4 +66,4 @@ The final value has to be 1. Because the first thead just waits for the value to

`./x86.py -p wait-for-me.s -a ax=0,ax=1 -R ax -M 2000`

Thread 0 is just waiting for thread 1 to set the value to 1. If thread 0 runs before thead 1, it waits until interruption happens. Thats is a waste of CPU. Sorter interruption frequency will improve performance.
Thread 0 is just waiting for thread 1 to set the value to 1. If thread 0 runs before thead 1, it waits until interruption happens. Thats is a waste of CPU. Shorter interruption frequency will improve performance.