Education kit for teaching introductory Arm-based system-on-chip design on FPGA with lectures and practical labs (educational)
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Updated
Oct 7, 2025 - HTML
Education kit for teaching introductory Arm-based system-on-chip design on FPGA with lectures and practical labs (educational)
Education kit for teaching advanced Arm Cortex-A system-on-chip design on FPGA platforms with lectures and hands-on labs (educational)
ElemRV - End-to-end Open-Source RISC-V Microcontroller
Textbook for advanced students and engineers on modern SoC design using Arm Cortex-A: architecture, interconnects, validation, and fabrication (educational)
Reference book for SoC and FPGA designers integrating Arm Cortex-M processors with AMBA bus architectures (educational)
Learning Path: RISC-V System-on-Chip (SoC) design, from Register Transfer Level (RTL) to a GDSII layout | Complete VLSI design flow using open-source EDA tools.
Collected article documents in PDF covering subject with co-simulation, embedded systems, software development and logic design and verification
This project focuses on the design and implementation of a digital security system incorporating cryptographic algorithms like Caesar, ChaCha, AES, and Prince, alongside the development of electronic circuits targeting preconfigured microcontrollers within limited hardware environments.
Projects System On Chip (Zynq700)
This project showcases a Verilog implementation of an System on Chip design where the RISC-V processor is connected to multiple peripherals using APB bus
Documented my learnings of the System-on-Chip course using Verilog. Verilog enthusiasts interested in adding more VHDL concepts into this repository are more than welcome to fork, clone and add contributions!
Balanced ternary logic SoC with CPU, memory controllers, and complete synthesis flow for silicon fabrication
RISC-V Reference SoC Design and Tapeout Program Phase 2 personal documentation
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