perf(colibri): K2 — 1×4 union tile in the planar IDOT matmul (bit-identical)

[JustVugg]

The idea

The prefill union delivers each expert nr = 2..16 activation rows, and the per-row kernel re-paid the weight block's load + mask for every one of them — which is why measured GMAC/s was flat in S. K2 pays it once per 4 rows: inside matmul_i4p_idot, rows go 4 at a time (one accumulator each, the masked lo/hi weight forms shared across the four vpdpbusd pairs), with a per-row remainder identical to the old path.

Dispatch untouched — every planar IDOT caller gets the tile for free; S<4 falls through to the exact per-row loop. Structurally this is the piece llama.cpp cannot copy: their wave-prefill rows are redundant replays, so a tile over them would only speed up wasted work; the union's rows are genuinely distinct at 1× I/O.

Measured (harness vs the pair-layout IDOT baseline, i7-1355U AVX-VNNI)

S	baseline	K1+K2 planar tile	ratio
2	76.9–83.3 GMAC/s	145.6–153.2	1.84–1.89×
4	72.3–81.7	193.0–253.2	2.67–3.10×
8	87.8–89.4	229.3–248.5	2.57–2.83×

0 bit mismatches at every S and shape (integer sums — bit-identical by associativity). Matches the audit prototype's 2.70–2.99× prediction at S=4.

Verification

• test_int_kernel_exact now runs the matmul comparison at S=6 (4-row tile main + 2-row remainder): 3,968 checks, 0 failures — and the ARM job from ci: ARM oracle job + integer-kernel bit-exactness gate (closes #1081) #1083 keeps holding the same bar with NEON live (the tile is gated coli_dpbusd256, so non-VNNI builds keep the per-row loop verbatim)
• glm_tiny e2e at int4: tokens byte-identical vs unpatched dev, [K1] activation line confirming the planar path actually ran

Series: 0.1 ✅ · K1 #1079 ✅ · #1086 fixes ✅ · this PR = K2 · next: K3 fusion on the FUSED3 (#1082) shape, then the perplexity ablation unlocking g_i4s=1 + fmt=4/gs64 planar.

🤖 Generated with Claude Code